#ifndef __UDSF_DATA_ACQ_C_
#define __UDSF_DATA_ACQ_C_

#include "udf_global.h"
/*
*   notice:
*   UDSF 同UDF编程：不可调用cstd-lib,只可调用"sdk_ifs_udk_cfg.h"、"sys_api.h"中列出的API函数。
*   UDSF文件内函数均需使用static修饰符，且UDF中以#include "UDSF.c"形式引用
*/

#include "udsf_uart.c"
#include "udsf_spi.c"
#include "udsf_delay.c"

static void udsf_data_acquisiton_continue(void) __attribute__((unused));
static void udsf_data_acquisiton_chirpsum(int predata_en,int alg0_en,int alg25_en) __attribute__((unused));


static void udsf_xxx_rtc_set(uint8_t id,uint32_t value){

	if( id == 0 ){
		SYSC->CLK_EN &= ~RTC0_PATTERN_SW_Msk; // rtc0 clk enable
		RTC0->CMP = value;
		RTC0->CLR = RTC_CLR_Msk;  // clear  rtc0 cnt
		RTC0->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtc0 irq flag clear
		RTC0->IRQ_CFG &= ~RTC_IRQ_MASK_Msk;  // rtc0 irq enable
		RTC0->WKU_CFG = 0x00;                // BIT1:1,repeat 0,single   BIT0:1,cmp*1024 0,cmp*1
	}
	else if( id == 1 ){
		SYSC->CLK_EN &= ~RTC1_PATTERN_SW_Msk; // rtc1 clk enable
		RTC1->CMP = value;
		RTC1->CLR = RTC_CLR_Msk;  // clear  rtc1 cnt
		RTC1->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtc1 irq flag clear
		RTC1->IRQ_CFG &= ~RTC_IRQ_MASK_Msk;  // rtc1 irq enable
		RTC1->WKU_CFG = 0x00;                // BIT1:1,repeat 0,single   BIT0:1,cmp*1024 0,cmp*1
	}
	else{
		;
	}
	
	return;
}

static void udsf_xxx_rtc_get_block(uint8_t id){

	if( id == 0 ){
		while ((RTC0->IRQ_CFG & 0x1ul) == 0); //wait rtc0 irq
		RTC0->IRQ_CFG |= RTC_IRQ_MASK_Pos;   // rtc0 irq disable
		RTC0->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtc0 irq flag clear
		SYSC->CLK_EN  |= RTC0_PATTERN_SW_Msk;// rtc0 clk disable
	}else{
		while ((RTC1->IRQ_CFG & 0x1ul) == 0); // wait rtc1 irq
		RTC1->IRQ_CFG |= RTC_IRQ_MASK_Pos;    // rtc1 irq disable
		RTC1->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;   // rtc1 irq flag clear
		SYSC->CLK_EN  |= RTC1_PATTERN_SW_Msk; // rtc1 clk disable
	}
}

static void udsf_data_acquisiton_continue(void)
{
		PREPDATA_HANDLE(); // copy range/vel win,copy multi-coefficient
		BBE_PREPINIT(paramDataPrep);       // PrepData param -> BBE REG
		RF_VENUS_INIT();
		
		uint32_t ana2_config0_rf_on  = paramANA_Venus->ana2.ana_cfg0;
		uint32_t ana2_config0_rf_off = paramANA_Venus->ana2.ana_cfg0 & (~1);

		paramANA_Venus->ana2.ana_cfg0 = ana2_config0_rf_off;
		
		ANACFG_SET(&paramANA_Venus->ana2); // all on but rf
		udsf_delay_us(20); // wait pll ready
	
		paramANA_Venus->ana2.ana_cfg0 = ana2_config0_rf_on;
		ana_Venus_st->ramp_cmd = VENUS_WAVE_START;       // sweep start
		ANACFG_SET(&paramANA_Venus->ana2); // rf on

		// wait dataprep end
		BBE_WAITISR(BBE_ISR_PREP_FRAME_END);
		
		RF_VENUS_DEINIT(); // sweep end
		BBE_OPGATE_DIS(BBE_GATE_PREP);//dp clock disable
		ANACFG_SET(&paramANA_Venus->ana1); //40M		
}

static void udsf_data_acquisiton_chirpsum(int predata_en,int alg0_en,int alg25_en)
{ 
	if( predata_en ){
		PREPDATA_HANDLE();
	}

	BBE_PREPINIT(paramDataPrep);    //bbe init, 2.9us
	RF_VENUS_INIT(); //4.9us

	uint32_t ana2_config0_rf_on  = paramANA_Venus->ana2.ana_cfg0;
	uint32_t ana2_config0_rf_off = paramANA_Venus->ana2.ana_cfg0 & (~1);

	paramANA_Venus->ana2.ana_cfg0 = ana2_config0_rf_off;
	ANACFG_SET(&paramANA_Venus->ana2);  // all on but rf
	paramANA_Venus->ana2.ana_cfg0 = ana2_config0_rf_on;

	ana_Venus_st->ramp_cmd = VENUS_WAVE_START;       // sweep start
	

	bbe_regb_str->ISR = BBE_ISR_RAMP_PEDGE;	         // wair for wave0-B
	while( (bbe_regb_str->ISR & BBE_ISR_RAMP_PEDGE)==0 );
	
	int chirp_cnt = 0;
	do{
		//udsf_delay_us(10);// wave0 b段1/3位置附近处开rf
		ANACFG_SET(&paramANA_Venus->ana2); // rf on

		// wait dataprep end
		bbe_regb_str->OP_CLEAR=BBE_CLEAR_PREP;
		BBE_ISR_CLEAR(BBE_ISR_PREP_FRAME_END);// dataprep在wave0-A可能已采集满 add@230608
		BBE_WAITISR(BBE_ISR_PREP_FRAME_END);

		udsf_delay_us(10);// wave1 C段1/3位置附近处关rf
		ANACFG_SET(&paramANA_Venus->ana3); // rf if off

		if( alg0_en ){
			P2_FFT_STEPCFG8_HANDLE(&paramALG->alg0,paramALG->alg0_dstInc*chirp_cnt);
		}

		if( alg25_en ){
			P2_FFT_STEPCFG8_HANDLE(&paramALG->alg25,paramALG->alg25_dstInc*chirp_cnt);
		}

		chirp_cnt++;

		if( paramDataPrep->cycleNum != chirp_cnt ){
			bbe_regb_str->ISR = BBE_ISR_RAMP_PEDGE;	     // wait for wave0-B
			while( (bbe_regb_str->ISR & BBE_ISR_RAMP_PEDGE)==0 );
		}
	}while(paramDataPrep->cycleNum != chirp_cnt);

	RF_VENUS_DEINIT();
	BBE_OPGATE_DIS(BBE_GATE_PREP);//|BBE_GATE_P2|BBE_GATE_FFT);
	ANACFG_SET(&paramANA_Venus->ana1); //40M
	
}

#endif
